Integrated Multi-Level CMOS Electrostatic Discharge (MLC-ESD) Protection Medical Ultrasound Chip System

Jian Chiun Liou; Wen De Lin

doi:10.1109/GTSD.2016.28

Integrated Multi-Level CMOS Electrostatic Discharge (MLC-ESD) Protection Medical Ultrasound Chip System

Jian Chiun Liou, Wen De Lin

研究成果: 書貢獻/報告類型 › 會議貢獻

1 引文斯高帕斯（Scopus）

摘要

This paper describes the advantages of integrating a common Power Clamp with the ability to withstand voltage and save on wafer area. The system chip does not require a power clamp for each input source. It is as long as the system core circuit by electrostatic protection. It can reach normal operation and save as much chip area as possible. The structure of this paper has three main features: (1) electrostatic protection (ESD) circuit common Power Clamp combination (2) T025 process high and low voltage ESD (3) The experiment and results within ESD system. The results of ESD sensitivity passed is-6250V~+6200V for type HBM mode. It is-375V~+375V for type MM mode.

原文	英語
主出版物標題	Proceedings - 3rd International Conference on Green Technology and Sustainable Development, GTSD 2016
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	78-81
頁數	4
ISBN（電子）	9781509036387
DOIs	https://doi.org/10.1109/GTSD.2016.28
出版狀態	已發佈 - 十二月 22 2016
對外發佈	Yes
事件	3rd International Conference on Green Technology and Sustainable Development, GTSD 2016 - Kaohsiung, 臺灣持續時間: 十一月 24 2016 → 十一月 25 2016

會議

會議	3rd International Conference on Green Technology and Sustainable Development, GTSD 2016
國家	臺灣
城市	Kaohsiung
期間	11/24/16 → 11/25/16

ASJC Scopus subject areas

Environmental Science (miscellaneous)
Environmental Engineering

存取文件

10.1109/GTSD.2016.28

其它文件與鏈接

指紋深入研究「Integrated Multi-Level CMOS Electrostatic Discharge (MLC-ESD) Protection Medical Ultrasound Chip System」主題。共同形成了獨特的指紋。

引用此

Integrated Multi-Level CMOS Electrostatic Discharge (MLC-ESD) Protection Medical Ultrasound Chip System. / Liou, Jian Chiun; Lin, Wen De.

Proceedings - 3rd International Conference on Green Technology and Sustainable Development, GTSD 2016. Institute of Electrical and Electronics Engineers Inc., 2016. p. 78-81 7796623.

研究成果: 書貢獻/報告類型 › 會議貢獻

Liou, JC & Lin, WD 2016, Integrated Multi-Level CMOS Electrostatic Discharge (MLC-ESD) Protection Medical Ultrasound Chip System. 於 Proceedings - 3rd International Conference on Green Technology and Sustainable Development, GTSD 2016., 7796623, Institute of Electrical and Electronics Engineers Inc., 頁 78-81, 3rd International Conference on Green Technology and Sustainable Development, GTSD 2016, Kaohsiung, 臺灣, 11/24/16. https://doi.org/10.1109/GTSD.2016.28

@inproceedings{c07c3515d25f4cc7ae7d0c85443f1069,

title = "Integrated Multi-Level CMOS Electrostatic Discharge (MLC-ESD) Protection Medical Ultrasound Chip System",

abstract = "This paper describes the advantages of integrating a common Power Clamp with the ability to withstand voltage and save on wafer area. The system chip does not require a power clamp for each input source. It is as long as the system core circuit by electrostatic protection. It can reach normal operation and save as much chip area as possible. The structure of this paper has three main features: (1) electrostatic protection (ESD) circuit common Power Clamp combination (2) T025 process high and low voltage ESD (3) The experiment and results within ESD system. The results of ESD sensitivity passed is-6250V~+6200V for type HBM mode. It is-375V~+375V for type MM mode.",

keywords = "CMOS, ESD",

author = "Liou, {Jian Chiun} and Lin, {Wen De}",

year = "2016",

month = dec,

day = "22",

doi = "10.1109/GTSD.2016.28",

language = "English",

pages = "78--81",

booktitle = "Proceedings - 3rd International Conference on Green Technology and Sustainable Development, GTSD 2016",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "3rd International Conference on Green Technology and Sustainable Development, GTSD 2016 ; Conference date: 24-11-2016 Through 25-11-2016",

}

TY - GEN

T1 - Integrated Multi-Level CMOS Electrostatic Discharge (MLC-ESD) Protection Medical Ultrasound Chip System

AU - Liou, Jian Chiun

AU - Lin, Wen De

PY - 2016/12/22

Y1 - 2016/12/22

N2 - This paper describes the advantages of integrating a common Power Clamp with the ability to withstand voltage and save on wafer area. The system chip does not require a power clamp for each input source. It is as long as the system core circuit by electrostatic protection. It can reach normal operation and save as much chip area as possible. The structure of this paper has three main features: (1) electrostatic protection (ESD) circuit common Power Clamp combination (2) T025 process high and low voltage ESD (3) The experiment and results within ESD system. The results of ESD sensitivity passed is-6250V~+6200V for type HBM mode. It is-375V~+375V for type MM mode.

AB - This paper describes the advantages of integrating a common Power Clamp with the ability to withstand voltage and save on wafer area. The system chip does not require a power clamp for each input source. It is as long as the system core circuit by electrostatic protection. It can reach normal operation and save as much chip area as possible. The structure of this paper has three main features: (1) electrostatic protection (ESD) circuit common Power Clamp combination (2) T025 process high and low voltage ESD (3) The experiment and results within ESD system. The results of ESD sensitivity passed is-6250V~+6200V for type HBM mode. It is-375V~+375V for type MM mode.

KW - CMOS

KW - ESD

UR - http://www.scopus.com/inward/record.url?scp=85011028273&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85011028273&partnerID=8YFLogxK

U2 - 10.1109/GTSD.2016.28

DO - 10.1109/GTSD.2016.28

M3 - Conference contribution

AN - SCOPUS:85011028273

SP - 78

EP - 81

BT - Proceedings - 3rd International Conference on Green Technology and Sustainable Development, GTSD 2016

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 3rd International Conference on Green Technology and Sustainable Development, GTSD 2016

Y2 - 24 November 2016 through 25 November 2016

ER -