Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology

Jhe Yue Li, Jau Ji Jou, Tien Tsorng Shih, Chien Liang Chiu, Jian Chiun Liou, Hsin Wen Ting

研究成果: 書貢獻/報告類型會議貢獻

4 引文 斯高帕斯(Scopus)

摘要

Using 4-level pulse amplitude modulation (PAM-4) technique, the transmission data bit rate of the system or circuit can be doubled at the same bandwidth, compared to non-return zero (NRZ) binary modulation. In this paper, a PAM-4 vertical cavity surface emitting laser (VCSEL) diode driver circuit was designed in 90 nm CMOS technology. Through our circuit, two 10-Gb/s non-return zero (NRZ) input signals can be combined as a 20-Gb/s (10-GBaud/s) PAM-4 output current signal to drive a VCSEL diode. In our laser diode driver (LDD) circuit, the total modulation current is about 6.2mA, the power consumption is 34.1mW, and the chip size is 0.5×0.62 mm2. The VCSEL driver can be suitable to use in the transmitter module of short range optical fiber communications.
原文英語
主出版物標題2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016
發行者Institute of Electrical and Electronics Engineers Inc.
頁面195-198
頁數4
ISBN(電子)9781509018307
DOIs
出版狀態已發佈 - 十二月 15 2016
對外發佈Yes
事件2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016 - Hong Kong, 香港
持續時間: 八月 3 2016八月 5 2016

會議

會議2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016
國家香港
城市Hong Kong
期間8/3/168/5/16

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture

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