This work presents a biomedical signal processor (BSP) with hybrid functional cores to optimize the power dissipation and system flexibility for mobile healthcare applications. Embedded with the biomedical core and a 32-bit RISC core, multi-features are extracted for classification and the abnormal data are compressed. In addition, the crypto core secures both the data and wireless link protocols to protect the user privacy. This BSP chip is fabricated in a 90nm standard CMOS technology with core area of 1.17mm 2. To overcome the leakage in advanced technology, a duty-cycled clock generator minimizes the system active duty and the inactive functions are power gated. Operating at 25MHz frequency and 0.5V supply voltage, the energy of RISC core is down to 3.44pJ/cycle. Accompanied with dedicated biomedical and crypto cores, the average BSP power achieves 38μW at 25MHz and 0.5/1.0V when performing the ECG alarm application.
|主出版物標題||2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011|
|出版狀態||已發佈 - 2011|
|事件||7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011 - Jeju, 大韓民國|
持續時間: 11月 14 2011 → 11月 16 2011
|其他||7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011|
|期間||11/14/11 → 11/16/11|
ASJC Scopus subject areas