Three dimensional architecture of multiplexing data registration integrated circuit for flat panel display

Fan Gang Tseng, Jian Chiun Liou

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

As Flat Panel Display become large in format, the data and gate lines turn into longer, parasitic capacitance and resistance increase, and the display signal is delayed. Three dimensional architecture of multiplexing data registration integrated circuit method is used that divides the data line into several blocks and provides the advantages of high accuracy, rapid selection, and reasonable switching speed.

Original languageEnglish
Pages (from-to)1293-1296
Number of pages4
JournalProceedings of International Meeting on Information Display
Volume8
Publication statusPublished - 2008
Externally publishedYes

Fingerprint

Flat panel displays
Multiplexing
Integrated circuits
Capacitance
Display devices

Keywords

  • 3D control circuit
  • Data registration
  • Flat panel
  • Multiplexing

ASJC Scopus subject areas

  • Engineering(all)

Cite this

@article{24ec4e4594674f63a12817acc9936e4d,
title = "Three dimensional architecture of multiplexing data registration integrated circuit for flat panel display",
abstract = "As Flat Panel Display become large in format, the data and gate lines turn into longer, parasitic capacitance and resistance increase, and the display signal is delayed. Three dimensional architecture of multiplexing data registration integrated circuit method is used that divides the data line into several blocks and provides the advantages of high accuracy, rapid selection, and reasonable switching speed.",
keywords = "3D control circuit, Data registration, Flat panel, Multiplexing",
author = "Tseng, {Fan Gang} and Liou, {Jian Chiun}",
year = "2008",
language = "English",
volume = "8",
pages = "1293--1296",
journal = "Proceedings of International Meeting on Information Display",
issn = "1738-7558",

}

TY - JOUR

T1 - Three dimensional architecture of multiplexing data registration integrated circuit for flat panel display

AU - Tseng, Fan Gang

AU - Liou, Jian Chiun

PY - 2008

Y1 - 2008

N2 - As Flat Panel Display become large in format, the data and gate lines turn into longer, parasitic capacitance and resistance increase, and the display signal is delayed. Three dimensional architecture of multiplexing data registration integrated circuit method is used that divides the data line into several blocks and provides the advantages of high accuracy, rapid selection, and reasonable switching speed.

AB - As Flat Panel Display become large in format, the data and gate lines turn into longer, parasitic capacitance and resistance increase, and the display signal is delayed. Three dimensional architecture of multiplexing data registration integrated circuit method is used that divides the data line into several blocks and provides the advantages of high accuracy, rapid selection, and reasonable switching speed.

KW - 3D control circuit

KW - Data registration

KW - Flat panel

KW - Multiplexing

UR - http://www.scopus.com/inward/record.url?scp=65649134716&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=65649134716&partnerID=8YFLogxK

M3 - Article

AN - SCOPUS:65649134716

VL - 8

SP - 1293

EP - 1296

JO - Proceedings of International Meeting on Information Display

JF - Proceedings of International Meeting on Information Display

SN - 1738-7558

ER -