Study on warpage and shrinkage of flip chip encapsulation process

Y. K. Shen, J. H. Liao, W. X. Zhao

Research output: Contribution to journalArticle

8 Citations (Scopus)

Abstract

Flip chip encapsulation process is currently the most advanced package technology due to its ability to provide a large number of I/O interconnections and improve electrical performance. It has the advantage of low cost, low interface and small volume in IC package. This paper indicates that the analysis for package of the solder ball chip and substrate. A finite element simulation of moving bounderies in a three-dimensional inertia-free, incompressible flow is presented. The injection situation uses for one line injection, L line injection, U line injection location. The injection process uses for different parameters (mold temperature, injection temperature, injection pressure, injection time). When the injection molding is end, then also finite element method to simulate the warpage and shrinkage for solder ball chip and substrate. The results show that the warpage is smallest on U line injection.

Original languageEnglish
Pages (from-to)693-702
Number of pages10
JournalInternational Communications in Heat and Mass Transfer
Volume31
Issue number5
DOIs
Publication statusPublished - Jul 1 2004
Externally publishedYes

ASJC Scopus subject areas

  • Atomic and Molecular Physics, and Optics
  • Chemical Engineering(all)
  • Condensed Matter Physics

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