Integrated Multi-Level CMOS Electrostatic Discharge (MLC-ESD) Protection Medical Ultrasound Chip System

Jian Chiun Liou; Wen De Lin

doi:10.1109/GTSD.2016.28

Integrated Multi-Level CMOS Electrostatic Discharge (MLC-ESD) Protection Medical Ultrasound Chip System

Jian Chiun Liou, Wen De Lin

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

This paper describes the advantages of integrating a common Power Clamp with the ability to withstand voltage and save on wafer area. The system chip does not require a power clamp for each input source. It is as long as the system core circuit by electrostatic protection. It can reach normal operation and save as much chip area as possible. The structure of this paper has three main features: (1) electrostatic protection (ESD) circuit common Power Clamp combination (2) T025 process high and low voltage ESD (3) The experiment and results within ESD system. The results of ESD sensitivity passed is-6250V~+6200V for type HBM mode. It is-375V~+375V for type MM mode.

Original language	English
Title of host publication	Proceedings - 3rd International Conference on Green Technology and Sustainable Development, GTSD 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	78-81
Number of pages	4
ISBN (Electronic)	9781509036387
DOIs	https://doi.org/10.1109/GTSD.2016.28
Publication status	Published - Dec 22 2016
Externally published	Yes
Event	3rd International Conference on Green Technology and Sustainable Development, GTSD 2016 - Kaohsiung, Taiwan Duration: Nov 24 2016 → Nov 25 2016

Conference

Conference	3rd International Conference on Green Technology and Sustainable Development, GTSD 2016
Country/Territory	Taiwan
City	Kaohsiung
Period	11/24/16 → 11/25/16

Keywords

CMOS
ESD

ASJC Scopus subject areas

Environmental Science (miscellaneous)
Environmental Engineering

Access to Document

10.1109/GTSD.2016.28

Cite this

Integrated Multi-Level CMOS Electrostatic Discharge (MLC-ESD) Protection Medical Ultrasound Chip System. / Liou, Jian Chiun; Lin, Wen De.

Proceedings - 3rd International Conference on Green Technology and Sustainable Development, GTSD 2016. Institute of Electrical and Electronics Engineers Inc., 2016. p. 78-81 7796623.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Liou, JC & Lin, WD 2016, Integrated Multi-Level CMOS Electrostatic Discharge (MLC-ESD) Protection Medical Ultrasound Chip System. in Proceedings - 3rd International Conference on Green Technology and Sustainable Development, GTSD 2016., 7796623, Institute of Electrical and Electronics Engineers Inc., pp. 78-81, 3rd International Conference on Green Technology and Sustainable Development, GTSD 2016, Kaohsiung, Taiwan, 11/24/16. https://doi.org/10.1109/GTSD.2016.28

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abstract = "This paper describes the advantages of integrating a common Power Clamp with the ability to withstand voltage and save on wafer area. The system chip does not require a power clamp for each input source. It is as long as the system core circuit by electrostatic protection. It can reach normal operation and save as much chip area as possible. The structure of this paper has three main features: (1) electrostatic protection (ESD) circuit common Power Clamp combination (2) T025 process high and low voltage ESD (3) The experiment and results within ESD system. The results of ESD sensitivity passed is-6250V~+6200V for type HBM mode. It is-375V~+375V for type MM mode.",

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N2 - This paper describes the advantages of integrating a common Power Clamp with the ability to withstand voltage and save on wafer area. The system chip does not require a power clamp for each input source. It is as long as the system core circuit by electrostatic protection. It can reach normal operation and save as much chip area as possible. The structure of this paper has three main features: (1) electrostatic protection (ESD) circuit common Power Clamp combination (2) T025 process high and low voltage ESD (3) The experiment and results within ESD system. The results of ESD sensitivity passed is-6250V~+6200V for type HBM mode. It is-375V~+375V for type MM mode.

AB - This paper describes the advantages of integrating a common Power Clamp with the ability to withstand voltage and save on wafer area. The system chip does not require a power clamp for each input source. It is as long as the system core circuit by electrostatic protection. It can reach normal operation and save as much chip area as possible. The structure of this paper has three main features: (1) electrostatic protection (ESD) circuit common Power Clamp combination (2) T025 process high and low voltage ESD (3) The experiment and results within ESD system. The results of ESD sensitivity passed is-6250V~+6200V for type HBM mode. It is-375V~+375V for type MM mode.

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KW - ESD

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Integrated Multi-Level CMOS Electrostatic Discharge (MLC-ESD) Protection Medical Ultrasound Chip System

Abstract

Conference

Keywords

ASJC Scopus subject areas

Access to Document

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