Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology

Jhe Yue Li, Jau Ji Jou, Tien Tsorng Shih, Chien Liang Chiu, Jian Chiun Liou, Hsin Wen Ting

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Using 4-level pulse amplitude modulation (PAM-4) technique, the transmission data bit rate of the system or circuit can be doubled at the same bandwidth, compared to non-return zero (NRZ) binary modulation. In this paper, a PAM-4 vertical cavity surface emitting laser (VCSEL) diode driver circuit was designed in 90 nm CMOS technology. Through our circuit, two 10-Gb/s non-return zero (NRZ) input signals can be combined as a 20-Gb/s (10-GBaud/s) PAM-4 output current signal to drive a VCSEL diode. In our laser diode driver (LDD) circuit, the total modulation current is about 6.2mA, the power consumption is 34.1mW, and the chip size is 0.5×0.62 mm2. The VCSEL driver can be suitable to use in the transmitter module of short range optical fiber communications.

Original languageEnglish
Title of host publication2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages195-198
Number of pages4
ISBN (Electronic)9781509018307
DOIs
Publication statusPublished - Dec 15 2016
Externally publishedYes
Event2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016 - Hong Kong, Hong Kong
Duration: Aug 3 2016Aug 5 2016

Conference

Conference2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016
CountryHong Kong
CityHong Kong
Period8/3/168/5/16

Fingerprint

Pulse amplitude modulation
Surface emitting lasers
Semiconductor lasers
Networks (circuits)
Modulation
Optical fiber communication
Data communication systems
Transmitters
Electric power utilization
Bandwidth

Keywords

  • 4-level pulse amplitude modulation (PAM-4)
  • laser diode driver (LDD)
  • vertical cavity surface emitting laser (VCSEL)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture

Cite this

Li, J. Y., Jou, J. J., Shih, T. T., Chiu, C. L., Liou, J. C., & Ting, H. W. (2016). Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology. In 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016 (pp. 195-198). [7785242] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2016.7785242

Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology. / Li, Jhe Yue; Jou, Jau Ji; Shih, Tien Tsorng; Chiu, Chien Liang; Liou, Jian Chiun; Ting, Hsin Wen.

2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016. Institute of Electrical and Electronics Engineers Inc., 2016. p. 195-198 7785242.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Li, JY, Jou, JJ, Shih, TT, Chiu, CL, Liou, JC & Ting, HW 2016, Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology. in 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016., 7785242, Institute of Electrical and Electronics Engineers Inc., pp. 195-198, 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016, Hong Kong, Hong Kong, 8/3/16. https://doi.org/10.1109/EDSSC.2016.7785242
Li JY, Jou JJ, Shih TT, Chiu CL, Liou JC, Ting HW. Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology. In 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016. Institute of Electrical and Electronics Engineers Inc. 2016. p. 195-198. 7785242 https://doi.org/10.1109/EDSSC.2016.7785242
Li, Jhe Yue ; Jou, Jau Ji ; Shih, Tien Tsorng ; Chiu, Chien Liang ; Liou, Jian Chiun ; Ting, Hsin Wen. / Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology. 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 195-198
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AB - Using 4-level pulse amplitude modulation (PAM-4) technique, the transmission data bit rate of the system or circuit can be doubled at the same bandwidth, compared to non-return zero (NRZ) binary modulation. In this paper, a PAM-4 vertical cavity surface emitting laser (VCSEL) diode driver circuit was designed in 90 nm CMOS technology. Through our circuit, two 10-Gb/s non-return zero (NRZ) input signals can be combined as a 20-Gb/s (10-GBaud/s) PAM-4 output current signal to drive a VCSEL diode. In our laser diode driver (LDD) circuit, the total modulation current is about 6.2mA, the power consumption is 34.1mW, and the chip size is 0.5×0.62 mm2. The VCSEL driver can be suitable to use in the transmitter module of short range optical fiber communications.

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